1. Technology Field
The present invention relates to a data writing method for a rewritable non-volatile memory, and a memory controller as well as a memory storage apparatus using the method.
2. Description of Related Art
Along with the widespread of digital cameras, cell phones, and MP3 in recently years, demands for storage media have increased drastically. With characteristics such as non-volatility of data, low power consumption, small volume, non-mechanical structure, and high access speed, the rewritable non-volatile memory is one of the most adaptable storage media for portable electronics devices, for example, notebook computers. A solid state drive is a memory storage apparatus adopting a flash memory as its storage medium. Consequently, the flash memory industry has become a very important part of the electronic industry in recent years.
A memory sub-module of a flash memory module has a plurality of physical units, and each of the physical units has a plurality of physical pages, wherein data must be written into a physical unit according to the sequence of the physical pages in the physical unit. Additionally, a physical page that has been written with data has to be erased before it is used again for writing updated data. In particular, data is erased with one physical unit as the smallest unit, and data is programmed (also referred to as writing) with one physical page as the smallest unit. Therefore, in the management of the flash memory module, the physical units are grouped into a data area and a free area.
The physical units belonging to the data area are used for storing data written by the host system. Specifically speaking, a memory management circuit of a memory storage apparatus converts a logical access address to be accessed by the host system to a logical page of a logical unit and maps the logical page of the logical unit to a physical page of a physical unit in the data area. In other words, in the management of the flash memory module, the physical units in the data area are considered as physical units already used (e.g., stored with data written by the host system). For instance, the memory management circuit uses a logical unit-physical unit mapping table to record a mapping relationship between the logical units and the physical units in the data area, wherein the logical pages of the logical units sequentially correspond to the physical pages of the physical units.
The physical units belonging to the free area are used to substitute the physical units in the data area. In particular, as described above, the physical units that have written with data have to be erased before it is used for writing updated data again. Accordingly, the physical units belonging to the free area are used for writing with updated data to be written into logical units and substituting the physical units originally mapped to the logical units. Hence, the physical units in the free area are either blank or available physical units (i.e., no data is recorded in these blocks or the data recorded in these blocks is marked as invalid data).
In other words, the physical pages of the physical units belonging to the data area and the free area are mapped alternatively to the logical pages of the logical units for storing data written by the host system. As an example, the memory management circuit of the memory storage apparatus gets one or more physical units from the free area to be one or more global random physical units and writes updated data into a physical page of the global random physical units when the logical access address into which the host system is about to write updated data corresponds to a certain logical page of a certain logical unit of the memory storage apparatus. Furthermore, the memory management circuit records updated information of the updated logical page in a global random physical unit search table. In other words, the global random physical unit search table records valid data of a logical unit is written into which physical pages of which global random physical units. Accordingly, when updated data of a certain logical page of a certain logical unit is stored in a global random physical unit, the memory management circuit may look up the global random physical unit search table to read the valid data belonging to the logical unit.
In such a structure in which the global random physical unit is used for writing data from the host system, the global random physical units may possibly be filled very soon if the host system continuously writes a large amount of sequential data into the memory storage apparatus. At this time, if the free area does not have enough physical units to be a new global random physical unit, the memory management circuit has to perform a data merging procedure in order to continue executing the write command and to prevent the physical units in the free area from being exhausted.
More specifically, in the data merging procedure, the memory management circuit gets a blank physical unit and copies valid data belonging to the same logical unit to the gotten physical unit from the global random physical units and the data area. As such, the global random physical units or the physical units in the data area that store only invalid data may be erased and associated with the free area. The data merging procedure significantly prolongs the time for executing the write command, and thereby possibly causing time-out. Hence, how to reduce execution of the above data merging procedure so as to increase efficacy of the memory storage apparatus has become one of the major subjects in the industry.
Nothing herein should be construed as an admission of knowledge in the prior art of any portion of the present invention. Furthermore, citation or identification of any document in this application is not an admission that such document is available as prior art to the present invention, or that any reference forms a part of the common general knowledge in the art.